MBP 1,1-10,2 Finding a workaround for unibody MBPs w/ a bad RAM slot

[dosdude1]

Thanks for the offer!
I found a set of these chips for pretty cheap on Aliexpress and will probably order them to try it out - I will definitely post here with progress if I do.
(I first scrolled through twenty pages of eBay SODIMMs trying to find 8GB sticks with eight FBGA-96 chips, but no luck there...)

Out of curiosity, what four unrouted pins are necessary for TwinDie chips? The 820-3536 schematic’s NC pins seem to match the NC pins on the TwinDie datasheet I pulled up for an MT41K512M16VRP, but I’m sure I’m just missing something again.

If you look at the datasheet for a Micron 16-bit TwinDie chip, look at the pinout diagram for the BGA96 version. It’ll have 4 pins with a blue dot inside them; those are the extra ones that need to be there for TwinDie to work.

 

[B S Magnet]

Those are different, and use 32-bit LPDDR3. As such, only two chips make up a rank. LPDDR3 chips in that footprint were made in up to 32Gbit density, four of which make up 16GB. You can indeed install these 32Gbit chips on a 2013 or 2014 MacBook Air, and it works exactly as intended after modifying the SPD data in the system’s SPI ROM with the appropriate data. I have performed this upgrade a few times as well.

Since we’re on the topic of Haswell CPUs in Macs, the question I’ve had since coming across this discussion on the iMacs forum is whether the Haswell iMacs — in particular, the one-slot-per-channel 21.5-inch models — will work with DDR3 16GB SO-DIMMs with 8-gigabit modules. The opening post (relating to a 27-inch model with two slots per channel) registered the presence of 16GB DIMMs, but ran into troubles with either 24 or 32GB on a channel. All I have is a 21.5-inch Haswell 2.9GHz model from late 2013, still with its OEM 2x4GB configuration.

What isn’t clear: whether the Haswell chip design and firmware on Macs makes 2x16GB possible, or whether the limitations discussed already with Ivy Bridge and Sandy Bridge continued here and weren’t dealt with for Core-series CPUs until the Broadwells came out.

What, if any, DIMM variations have you tried out in your testing and experimentation on Haswell Macs with non-soldered RAM?

 

[Needleroozer]

Luckily that's not an issue with that model, as it uses 16-bit chips instead of the standard 8-bit chips, so address line 15 isn't needed. However, what is an issue is that the 4 extra pins needed for TwinDie chips are NOT routed... Meaning your only chance would be to use actual 8Gbit chips and hope they work. These are the chips you'd need. I really have no idea if Haswell U-series supports 8Gbit chips or not, but I may test with my machine at some point if you don't end up doing so beforehand. If you do decide to attempt this upgrade, let me know, and I can create the necessary SPD data for you.

It took me way longer than I expected to get around to it, but I was able to borrow a preheater and hot-air gun and swap the chips over this weekend.
Just for grins, I turned it on, and it actually booted into macOS, though it only thinks it has 4GB of RAM available (as one would expect).
Do you happen to have the SPD data for these chips easily available? If not, I’m tempted to see what happens if I just modify the SDRAM density/bank count field in the existing SPD to match my new ones.

 

[dosdude1]

It took me way longer than I expected to get around to it, but I was able to borrow a preheater and hot-air gun and swap the chips over this weekend.
Just for grins, I turned it on, and it actually booted into macOS, though it only thinks it has 4GB of RAM available (as one would expect).
Do you happen to have the SPD data for these chips easily available? If not, I’m tempted to see what happens if I just modify the SDRAM density/bank count field in the existing SPD to match my new ones.

Yeah, you'll need to modify the SPD data manually, as no such SPD data exists for that configuration. You should only need to change byte 4 and byte 5 of the data, modifying "Total SDRAM capacity" to 8Gbit, and the number of "Row Address Bits" to 16... Though now that I see this, it looks like this config DOES require address line 15 (because now 16 address bits are needed for 8Gbit chips). Not sure what datasheet or what I was looking at when I made that previous post claiming address line 15 wasn't needed, but unfortunately it looks like that's not the case. Now I feel bad for making you waste money on these 8Gbit chips, which I'm sure were not cheap, and waste the time to install them. Regardless, I've attached the DDR3 SPD spec PDF, so you can take a look at that.

 

[Needleroozer]

Yeah, you'll need to modify the SPD data manually, as no such SPD data exists for that configuration. You should only need to change byte 4 and byte 5 of the data, modifying "Total SDRAM capacity" to 8Gbit, and the number of "Row Address Bits" to 16... Though now that I see this, it looks like this config DOES require address line 15 (because now 16 address bits are needed for 8Gbit chips). Not sure what datasheet or what I was looking at when I made that previous post claiming address line 15 wasn't needed, but unfortunately it looks like that's not the case. Now I feel bad for making you waste money on these 8Gbit chips, which I'm sure were not cheap, and waste the time to install them. Regardless, I've attached the DDR3 SPD spec PDF, so you can take a look at that.

Aw, darn...
I was about to hook up the SPI flash when I saw your response, so that chip thanks you for saving it from a couple heat cycles.

Yeah, it makes sense that we'd need all 16 address lines for these 8Gbit chips (2**16 address lines * 8 banks * 16 bits is indeed 8Gib) and so my original analysis of this board was unfortunately correct.
Maybe you were thinking of 16-bank chips somehow? Because that would allow 8GiB to be addressed with only 15 data lines, although the CPU doesn't seem to support that either.

I took a look at the boardview again, and the MEM_A_A15/MEM_B_A15 pads I'd want are unfortunately not on the outer perimeter - so I'd need to pull the CPU to get to them and then reball it. I don't have the stencil for that, but getting just the stencil isn't expensive at all.
I should be able to handle breaking out A15 on the RAM chips (although needing to reball them all will be a nuisance, especially since I could have just soldered directly to the new chips if I'd known this yesterday).

I only spent like $70ish on a set of ten of these 8Gbit chips since I grabbed them off Aliexpress, and I can always use more BGA practice, so I suppose it's not a total loss.

Any chance that you would be interested in a lightly-used set of ten 8Gbit FBGA96 chips for the cost of shipping?
If not, there's not really anything keeping me from ordering a CPU stencil and giving it a shot (knowing that the odds of success are slim to nil)...

 

[dosdude1]

Aw, darn...
I was about to hook up the SPI flash when I saw your response, so that chip thanks you for saving it from a couple heat cycles.

Yeah, it makes sense that we'd need all 16 address lines for these 8Gbit chips (2**16 address lines * 8 banks * 16 bits is indeed 8Gib) and so my original analysis of this board was unfortunately correct.
Maybe you were thinking of 16-bank chips somehow? Because that would allow 8GiB to be addressed with only 15 data lines, although the CPU doesn't seem to support that either.

I took a look at the boardview again, and the MEM_A_A15/MEM_B_A15 pads I'd want are unfortunately not on the outer perimeter - so I'd need to pull the CPU to get to them and then reball it. I don't have the stencil for that, but getting just the stencil isn't expensive at all.
I should be able to handle breaking out A15 on the RAM chips (although needing to reball them all will be a nuisance, especially since I could have just soldered directly to the new chips if I'd known this yesterday).

I only spent like $70ish on a set of ten of these 8Gbit chips since I grabbed them off Aliexpress, and I can always use more BGA practice, so I suppose it's not a total loss.

Any chance that you would be interested in a lightly-used set of ten 8Gbit FBGA96 chips for the cost of shipping?
If not, there's not really anything keeping me from ordering a CPU stencil and giving it a shot (knowing that the odds of success are slim to nil)...

I wouldn't go through that trouble... It's unlikely that Haswell even supports 8Gbit chips to begin with, and getting the two wires (for address line 15 of each memory channel) wired up to the pads of the CPU is going to be a massive pain.

As for the chips, I'm not sure if I'd have much use for them LOL, not much uses 16-bit DDR3 chips.

 

[Needleroozer]

I wouldn't go through that trouble... It's unlikely that Haswell even supports 8Gbit chips to begin with, and getting the two wires (for address line 15 of each memory channel) wired up to the pads of the CPU is going to be a massive pain.

I would have borrowed a binocular microscope for wiring those pads, but it would definitely have been tricky.
Signal integrity concerns would also probably have made it difficult to get this working reliably since a piece of 40AWG wire isn’t going to have the controlled impedance of a multi-layer PCB.

As for the chips, I'm not sure if I'd have much use for them LOL, not much uses 16-bit DDR3 chips.

Alright, I guess they’ll just stay on the board as a *technically* 8GB 820-3536 unless I find some other project that can use them.

Thanks for your advice on this project even though it didn’t work out; I am definitely more willing to attempt other RAM upgrades in the future (I have a MacBookAir1,1 that wouldn’t mind an extra 2GB, for example).