Hello, This question has likely already been answered many times previously, however curiosity had gotten the best of me to ask on this forum. As likely far fetched as it sounds I'm asking if it is at all possible to change system parameters of the PowerMac G5, such as: Memory Speed, Clock Ratios, BCLK and other parameters as expected through a modifying bootstrap code, firmware or such. Even if this ends up not being practical or possible, I would appreciate knowing more about the inner working of the G5's architecture.
For me, I'm not extremely knowledged on the full system architecture of the Power Mac G5 (The PCI-e Models to be more exact as that's what I have) and how the various devices communicate with one another (However most I can make educated guesses to how they interface with the system from studying regular motherboards). For the basics I can gather that the Host G5 processor communicates at exactly half the operating clock of its primary clock speed (E.g. 2.3Ghz CPU = 1.15Ghz FSB), and that (from studying the traces and general placement, along with online research) the memory controller is embedded in the system chipset or "U3" / "U4" as called through software. As someone who is modestly knowledgeable in the workings of computers, If anybody knows more about the PowerMac G5 system architecture and could explain then it would be much appreciated.
This post may (and probably will) just be a waste of time and the system parameters may just be automatically calculated or fixed in hardware and non re-programmable, but I'd appreciate the insight regardless. Thank you to anyone in advance.
For me, I'm not extremely knowledged on the full system architecture of the Power Mac G5 (The PCI-e Models to be more exact as that's what I have) and how the various devices communicate with one another (However most I can make educated guesses to how they interface with the system from studying regular motherboards). For the basics I can gather that the Host G5 processor communicates at exactly half the operating clock of its primary clock speed (E.g. 2.3Ghz CPU = 1.15Ghz FSB), and that (from studying the traces and general placement, along with online research) the memory controller is embedded in the system chipset or "U3" / "U4" as called through software. As someone who is modestly knowledgeable in the workings of computers, If anybody knows more about the PowerMac G5 system architecture and could explain then it would be much appreciated.
This post may (and probably will) just be a waste of time and the system parameters may just be automatically calculated or fixed in hardware and non re-programmable, but I'd appreciate the insight regardless. Thank you to anyone in advance.
