Apple Debuts Next-Generation M4 Chip

[Confused-User]

- clock is about 8% faster, presumably at essentially flat power (no mean feat)

Sorry, should have commented on this first...

I wonder about this. They spoke about the new copper and graphite heat spreaders, which led me to expect that heat dissipation will go up slightly. So power goes up a bit too. I don't *think* this is related to the new OLED, as that already covers the entire surface area of the pad - what good would a spreader do? But it's possible that they simply wanted to do a better job distributing heat than in previous pads, perhaps with better materials allowing them to go thinner.

Is there any hard data that suggests power really is flat?

 

[DrWojtek]

The basic consensus right now, after a morning of frantic back and forth on Twitter and other platforms (I don't have time to give the details justifying this consensus) is that, as far as *CPU* goes

- clock is about 8% faster, presumably at essentially flat power (no mean feat)
- IPC gain is a few percent (very much dependent on exactly how you calculate things), nice but not spectacular
BUT
- addition of SME to the ISA...!!!

Many pieces of evidence that point to this last (totally unexpected) change.
If we look at this in more detail, and look between the lines, what SEEMS to be the case is that
(a) Apple and ARM negotiated some sort of compromise for SME that allows SME to execute on what is essentially AMX hardware. This means that SME is an outer product engine, and can potentially execute as an accelerator, not associated with a single core, just like AMX.

Practical meaning is that
- compiler can now target AMX/SME (don't have to go through Accelerate calls)
- no obvious reason that the AMX/SME hardware will be faster for matrix ops than was the previous AMX hardware (ie if you are already making Accelerate calls, I don't expect them to be much faster than the usual gen to gen speedups)

(b) SME comes with something (which no-one outside Apple/ARM seems to understand yet) called STREAMING SVE mode, which allows for various modifications to SVE. This seems to allow for a separate, different length, set of SVE registers. At the time this was announced (the name and pretty much nothing else) no-one could realy understand it. Now, what I think it means is
+ NEON on M4 gets bumped up to SVE. Quite possibly only as 128b SVE, possibly as 256b SVE. Either way, even if it's only 128b, it gets the compiler improvements that allow SVE to be a somewhat better compiler target than NEON (code that's a few percent faster and a few percent smaller)
+ STREAMING SVE allows the developer to execute 512b vector operations on SME/AMX. Uses the AMX register set. High latency, but great throughput. These vector ops already exist on AMX, but only via Accelerate calls.

So for vector code, the compiler can target SSVE (high throughput, high latency) or NEON/SVE. There will undoubtedly be various pragmas and flags to guide this, and a year of confusion till people figure out optimal patterns.

Interesting point is that GB6.3 is compiled with both SME and SVE. So why did it not get a speed boost from SVE?
Possible answers:
- it did, that's where the few percent IPC improvement of M4 comes from? If SVE is 128b, that's the sort of improvement level we would expect from using SVE128 rather than NEON.
- Apple SVE is 256b, which raises issues given NEONs 128b registers, and so an app has to somehow mark that it wants SVE [which will flip some CPU setting], otherwise it only gets NEON?


As far as Neural Engine goes, SOMETHING was added that dramatically improves the performance of language nets (as opposed to the earlier primary focus on vision nets).
This COULD be the indirect addressing that's referenced in a few recent ANE patents; or it could be the vector DSP that's referenced in two recent patents.
In both cases, the ultimate performance boost of this addition may be much higher; it may be that right now only one or two neural net layers within CoreML have been boosted to use this functionality, and more will follow.

GPU seems unchanged (in the sense that it's M3 GPU, as expected).

Display block obviously is boosted to handle Tandem OLED, with who knows what consequences for lesser screens.

Media block is the great unknown. The references to 8K support [when you compare M4 iPad Pro to M2 iPad Pro] make me suspect that encoding speed has been bumped up (possibly also with slightly better quality) for lesser formats like 4K or 2K h.265 (which were plenty fast on the M2, but waiting two minutes rather than four minutes is always nice!)

What do you do for a living to know these kind of things? I want to do the same thing.

 

[Frantisekj]

Looks like the biggest functional changes over the M3 are in the display controllers, and moving to adding one or two efficiency cores.

The efficiency cores take up much less space the the performance cores, which is why I expect we won't see big jumps in performances cores for M4 (save some possible M4 Ultra.)

You will see that there is more based on recent benchmarks leaks that there is about 13% raw speed boost not connected to frequency boost.

And we should be sure when Apple took the risk of using own silicon that they had to be sure they can remain competitive for decade at least considering all the improvements competitors can achieve.
When they will keep advantage of being first to use the newest manufacturing process for year then fine tuning designs, upping frequency and utilizing efficiency of manufacturing process they have good position. Now just solve high end chips for MacPro.

 

[FriendlyMackle]

Playing games i get about 2 hours. 3 maaaaaaybe 4 watching YouTube videos.. still works great if i just use it plugged in lol.. I‘ve pretty much ditched my laptop and this is my daily driver so it’s worth the upgrade seeing as how this is a 2021 model and it’s really a 3 generation jump in processor. I have decided I don’t need to go max with the 1TB this time though, looking back, that was overkill.

Yeah, I'm very tempted to get the 1TB in order to have the 16GB RAM.
I know I don't need it.
I definitely don't need 1TB storage on an iPad. I just don't save that much data (files) on my iPads. If it was a laptop, 1TB would be the minimum I would want. But my last several iPad Pros have been 256GB and I usually have around 100GB free even several years into ownership. So I may just go for the 256GB as usual and save some cash.

 

[gaximus]

There is no "may" about it. You're wrong, as I and others have posted. The Mx, Mx Pro, and Mx Max are all different chips. (Even more so as of the M3 generation, where the Pro is no longer a sliced-off Max.) This has been well known since the first M1 Pro/Max shipped.

Further, many lower-end products are not "binned" in the usual sense ever- though sometimes they are. That's because the lower-end products are physically smaller. So a single defect in the chip, if you throw it out, costs you less in lost silicon than it would on a larger chip. The M series are all binned (though a lot of what you probably think of as binning is really just purposeful market segmentation). On the other hand, most A series chips were not (though a few were).

OK, OK, YOU'RE RIGHT, Is that what you were wanting to hear? My original comment was just saying not to be surprised that lower end products might have binned chips, and just made an assumption about the Pro and Max chips. Then made a correction comment saying I was wrong. Then you go on a rant about how wrong I was, and then saying they are NOT Binned in the "Usual" sense, (which I cleared up in my post), but sometimes are, and that M-Series are Binned, and A-Series aren't binned, but are binned. You post changes sides more times than a iHop. We'll just leave it at you right, and I'm wrong.

 

[chucker23n1]

OK, OK, YOU'RE RIGHT, Is that what you were wanting to hear? My original comment was just saying not to be surprised that lower end products might have binned chips, and just made an assumption about the Pro and Max chips. Then made a correction comment saying I was wrong. Then you go on a rant about how wrong I was, and then saying they are NOT Binned in the "Usual" sense, (which I cleared up in my post), but sometimes are, and that M-Series are Binned, and A-Series aren't binned, but are binned. You post changes sides more times than a iHop. We'll just leave it at you right, and I'm wrong.

Examples of binning:

• a CPU is offered in 4-core and 3-core variants with the same chip design. In this case, one of the cores probably just gets permanently shut off. For example, an M4 with 3 instead of 4 p-cores.
• a CPU is offered at a lower clock than usual. Intel does this a lot; IIRC, Apple has done it for some products like the HomePod.

In both cases, the externally visible chip design is the same, and in both cases, it's generally because of yield issues: it's cheaper to just sell the CPU anyway, as a lower-cost SKU, with fewer cores or the cores running at a lower clock, than to throw it away altogether.

Not an example of binning:

• the same cores (but different amounts) get offered in different chip designs. For example, an M3 vs. M3 Pro vs. M3 Max. The cores inside them are the same (just different amounts of them), but the layout of them differs dramatically. They aren't even the same size.

 

[name99]

Sorry, should have commented on this first...

I wonder about this. They spoke about the new copper and graphite heat spreaders, which led me to expect that heat dissipation will go up slightly. So power goes up a bit too. I don't *think* this is related to the new OLED, as that already covers the entire surface area of the pad - what good would a spreader do? But it's possible that they simply wanted to do a better job distributing heat than in previous pads, perhaps with better materials allowing them to go thinner.

Is there any hard data that suggests power really is flat?

No real data. So far they have tried really hard to limit P-core power to around 5..6W and it seems unlikely that will change.
Of course they have a lot of flexibility (a lot more than Intel) in terms of ways they can gradually dial down performance to limit power generation (or the various other concerns, like device getting too hot, or instantaneous current draw exceeding what the battery can handle). They certainly may decide that it's a good tradeoff to allow the device to hit, say, 9W for 30s, just to make it feel snappy for a brief interaction.

So calling it flat is perhaps too strong. But if you look at Intel, the official TDP numbers (which are admittedly a godawful mess, all over the place, don't mean what you think they mean, and vary in meaning from generation to generation) the 2020 top of the line peaks at 5.2GHz and has TDP of 125W; the 2024 top of the line peaks at 6GHz, has TDP of 125, and "turbo TDP" of 265W. You have to use ungodly amounts of power to get that last few percent of GHz (which they likewise can only support for brief sprints). I can't see Apple ever going to those sorts of lengths.

What I could see Apple doing (maybe already, maybe with this generation or a future generation) is characterizing the energy efficiency of each core, and having the scheduler steer threads to cores in order of efficiency, so that as much as possible that one thread that wants maximum GHz is also running on the most efficient P-core. Which is kinda a variant of what Intel and AMD do, though they tend to do it the other way, picking out the one core that might be able to run 100MHz faster than the others.

 

[name99]

There is no "may" about it. You're wrong, as I and others have posted. The Mx, Mx Pro, and Mx Max are all different chips. (Even more so as of the M3 generation, where the Pro is no longer a sliced-off Max.) This has been well known since the first M1 Pro/Max shipped.

Further, many lower-end products are not "binned" in the usual sense ever- though sometimes they are. That's because the lower-end products are physically smaller. So a single defect in the chip, if you throw it out, costs you less in lost silicon than it would on a larger chip. The M series are all binned (though a lot of what you probably think of as binning is really just purposeful market segmentation). On the other hand, most A series chips were not (though a few were).

I'm not going to push this because I've made the point before, and it's something people don't want to hear, but it i quite possible that Apple (and for that matter Intel and AMD) do NOT bin in the way you are describing.
For Apple in particular, I am sure they bin by energy efficiency and, as much as feasible, put say lower quality [less energy efficient] A chips into aTVs rather than iPhones.

BUT
when you buy a 9-core M4 are you buying one that has one of the core broken (or at least so energy inefficient it's not worth using). Or are you buying a device that locks one of the cores as a matter of business policy?
What Intel (and then AMD and Apple) have learned is that customers, who are otherwise insanely irrational about price, are willing to accept the fantasy that their not-quite-top-of-the-line (but a lot cheaper) devices are the consequence not of price segmentation but of blind forces of luck and randomness.

Personally I think this is fantastic. We get the optimal outcome for everyone (a mix of cheaper, but minimally worse, and more expensive, slightly nicer, devices) AND without the endless bitching and moaning that accompanies EVERY OTHER price issue in the tech world (Apple or x86 or Android).

So, it you need it to make you sleep, by all means continue to believe that this is all about binning. But if you want to be realistic about tech, open yourself up to the possibility that "real" binning may be a very small part of this segmentation. ..

 

[name99]

What do you do for a living to know these kind of things? I want to do the same thing.

Read very widely, follow like minded people. Develop the skills of being able to skip over the unimportant but think deeply about the important, and to see patterns. Both of these are not easy and take a lot of practice -- that's why they are SKILLs!

Academic papers contain ideas that may be useful and implemented in five to ten years.
Patents contain ideas that may have been implemented in the last generation.

Of course the mainstream internet response to both of these sources is to sneer at them.
Most people can't read patents (it's an art that takes some time to learn, and reading a single patent in isolation is usually worthless, you have to read multiple patents linked together to start to see the patterns, the hidden assumptions, what's new in this patent that isn't called out but is significant, etc etc).
And most people can't see the value in an academic idea that is impractical today, but won't be with ten years of progress.

 

[Confused-User]

I'm not going to push this because I've made the point before, and it's something people don't want to hear, but it i quite possible that Apple (and for that matter Intel and AMD) do NOT bin in the way you are describing.
[...]
So, it you need it to make you sleep, by all means continue to believe that this is all about binning. But if you want to be realistic about tech, open yourself up to the possibility that "real" binning may be a very small part of this segmentation. ..

That's exactly what I was saying earlier (#163):
"The M series are all binned (though a lot of what you probably think of as binning is really just purposeful market segmentation)."

I probably should have said "(though a lot of what gets called binning is really just purposeful market segmentation)."

 

[DrWojtek]

Read very widely, follow like minded people. Develop the skills of being able to skip over the unimportant but think deeply about the important, and to see patterns. Both of these are not easy and take a lot of practice -- that's why they are SKILLs!

Academic papers contain ideas that may be useful and implemented in five to ten years.
Patents contain ideas that may have been implemented in the last generation.

Of course the mainstream internet response to both of these sources is to sneer at them.
Most people can't read patents (it's an art that takes some time to learn, and reading a single patent in isolation is usually worthless, you have to read multiple patents linked together to start to see the patterns, the hidden assumptions, what's new in this patent that isn't called out but is significant, etc etc).
And most people can't see the value in an academic idea that is impractical today, but won't be with ten years of progress.

You sure those are skills? Sounds just like regular markers of high IQ to me.

Then again, sure, you have to practice it or at least learn to appreciate the knowledge gained from such activities. I guess that make them skills in some form. Skills only some can have

 

[Super Xander]

Think the A10 came out with the iPhone 7 in Sept 16, whereas A10X was June 2017 at WWDC! Good times...

Yes, but different processing node. A10X was the first on 10nm. A10 was still on 14nm

 

[Luposian]

My wife commented that her 13" M4 iPad Pro weighs about half what her M1 iPad Pro does. How is battery life on the M4? We're gonna be listing her 13" M1 iPad Pro on eBay to help offset the cost of her new M4 one.